A Test IC for Wafer-Level Characterization of an IntraCMOS-MEMS Fabrication Process
Keywords:Test devices, IC test, CMOS-MEMS, Integrated circuits, semiconductor devices
Monitoring of fabrication processes and the measurement of the electrical and mechanical properties of materials and devices at the silicon-wafer level are of vital importance on integrated system technologies. In this work, a test integrated circuit (IC) for the development of an IntraCMOS-MEMS fabrication process is presented. The test devices contained in the test IC are designed in such a way that 1) they can be used in CMOS-MEMS fabrication technologies using different materials, 2) take into account the capabilities of the manufacturing infrastructure, and 3) consider the selected integrated fabrication scheme; thus, any monolithic CMOS-MEMS process can be evaluated before, during and after the fabrication. The acquired data from the test devices will be useful to identify possible electrical and/or mechanical variations, in the properties of the materials used and in the performance characteristics of the devices, due to the fabrication process. The information acquired will help to adjust the simulation routines and the analytical modeling expressions. Finally, using the infrastructure of the MEMS Innovation Laboratory (LIMEMS-INAOE México) preliminary experimental results are presented.
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