Implementing Cryptographic Pairings on ARM dual-core Processors

Abstract

In this paper, we explore the parallelization capabilities of the ARM processing system embedded in a Zynq device for a software implementation of the optimal Ate pairing. First, the use of the NEON coprocessor was evaluated. It was found that on ARM v7 Cortex-A9 processors the computation of the optimal Ate pairing based on NEON does not perform better than an optimized ARM-assembly equivalent implementation. Therefore, we moved to explore the parallelization of pairing computation using a dual-core processing approach. By organizing operations of line evaluation and point arithmetic formulas to have little data dependency, it was possible to schedule independent operations to be perfomed simultaneously in separate cores of an ARM dual-core Cortex-A9 processor. The same principle was applied in the arithmetic procedures of the extensi´on fields. In this way, our software is able to perform 25.6% and 6.6% faster than the best two implementations previously reported on ARM Cortex- A9 processors.