An Area-Aware Figure of Merit for Improved State-of-the-Art Comparison of Analog-to-Digital Converters

Authors

Keywords:

Figure-of-Merit, Analog-to-Digital Converters, Area, Resolution, Bandwidth, Power dissipation.

Abstract

This paper introduces a new Figure-of-Merit (FoM) for Analog-to-Digital Converters (ADCs) that integrates silicon area alongside the traditional metrics of resolution, bandwidth, and power dissipation. As technology scaling and system-on-chip integration make area efficiency a critical design constraint, the established Walden and Schreier FoM's provide an incomplete comparison of state-of-the-art performance. The proposed Area-Aware FoM (FoM$_{\text{A}}$) enables a more integral and equitable benchmarking by directly quantifying the trade-off between dynamic performance and physical implementation cost. The validity and utility of the FoM$_{\text{A}}$ are demonstrated through a re-evaluation of over 40 published ADCs, revealing significant shifts in architectural ranking and offering designers a more relevant metric for advanced technology nodes.

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Author Biographies

Mauricio Velazquez-Diaz, National Institute for Astrophysics Optics and Electronics, Puebla, Mexico.

Mauricio Velazquez-Diaz received his B.Sc. degree in Electronic Engineering at the Autonomous University of Puebla, Mexico in 2019. He also received his M.Sc. degree in Electronic Circuit Design at National Institute of Astrophysics, Optics and Electronics (INAOE), Mexico in 2021. He is currently finishing his Ph.D. degree at INAOE. In 2024 he completed an Internship at Microelectronics Circuits Centre Ireland, Tyndal, in Ireland, and since 2025, he has been a research assistant. His research interests include Analog and Mixed Integrated Circuit Design, Robust Design, ADC converters for specific applications and Cryo-CMOS systems.

Victor Rodolfo Gonzalez-Diaz, Autonomous University of Puebla (BUAP)

Victor Rodolfo Gonzalez-Diaz received the M. Sc. and Ph. D. at the National Institute for Astrophysics, Optics, and Electronics (INAOE) Puebla México; in 2005 and 2009, respectively. He collaborated as a postdoc fellow at the Microsystems Laboratory of the University of Pavia, Italy, in 2009-2010; and works as a full-time professor at the Faculty of Electronics BUAP, Puebla, since 2011. He is the founder and head of the Circuits and Systems Characterization Laboratory at the same Faculty. Dr. Gonzalez-Diaz participates as an associate editor in IEEE TCAS-II express briefs. His research interests include the design of analog and mixed-signal integrated circuits focusing on analog-to-digital converter design, frequency synthesizers, and micropower management circuits.

Guillermo Espinosa Flores-Verdad

Guillermo Espinosa Flores-Verdad obtained the M.Sc. degree from INAOE, Mexico, and the Ph.D. degree from Pavia University, Italy in 1983 and 1989. From 1990 to 1993 he worked in the Central Research and Development Department at SGS- THOMSON Microelectronics Corp., Italy, as head of the Analog Library Automation Group. In February 1993, he joined the Electronics Department at the National Institute of Astrophysics, Optics and Electronics (INAOE), Mexico as a Professor Researcher. He was with Freescale Semiconductor from 2005 to 2008 leading the Freescale Mexico Technology Center. Since 2008, he is, again, at INAOE Electronics Department as a Professor Researcher. His main research interests are in Analog and Mixed Integrated Circuit Design and CAD development for the automatic design, synthesis, analysis and layout of ICs.

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Published

2026-06-12

How to Cite

Velazquez-Diaz, M., Gonzalez-Diaz, V. R., & Espinosa Flores-Verdad, G. (2026). An Area-Aware Figure of Merit for Improved State-of-the-Art Comparison of Analog-to-Digital Converters. IEEE Latin America Transactions, 24(8), 846–854. Retrieved from https://latamt.ieeer9.org/index.php/transactions/article/view/10640

Issue

Vol. 24 No. 8 (2026): Ordinary Issue

Section

Electronics