Early Soft Error Reliability Analysis on RISC-V

Authors

Keywords:

Reliability, RISC-V, Soft Error, Fault Injection

Abstract

The adoption of RISC-V processors bloomed in recent years, mainly due to its open standard and free instruction set architecture. However, much remains to help software engineers deliver high-reliability and bug-free applications and systems based on RISC-V IP designs. This work proposes an early soft error reliability assessment of a RISC-V processor, extending the previously proposed SOFIA fault injection framework. Results from 850k fault injections show that choosing the compiler flag -O2 to optimize performance causes 96% more Hang failures than -O0. Software engineers must evaluate compilation parameters on a case-by-case basis to find the best balance between performance and reliability. This work helps software engineers develop fault-tolerant RISC-V-based systems and applications more efficiently.

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Author Biographies

Nicolas Lodéa, PUCRS University

Nicolas Lodéa received a B.Sc. degree in Computer Engineering in 2019 from the University of Passo Fundo, Brazil. Currently, he is an M.Sc. student at the PPGCC at the PUCRS University, Brazil. His research focus is on soft error simulation with virtual platforms.

Willian Nunes, PUCRS University

Willian Nunes is an undergraduate student of Computer Engineering at PUCRS. He has participated in undergraduate research programs funded by government agencies. His research interests are in the areas of computer architecture, Microelectronics and non-synchronous circuits.

Vitor Zanini, PUCRS University

Vitor Zanini is an undergraduate student of Computer Engineering at PUCRS. He participates in a scientific initiation program at the Autonomous Systems Laboratory. His research interests are in the areas of computer architecture, robotics and embedded systems.

Marcos Sartori, PUCRS University

Marcos L. L. Sartori received a B.S. degree in Computer Engineering (2017) and an M.Sc. degree in Computer Science (2019) from PUCRS, Brazil. He is currently pursuing a Ph.D. in Computer Science at the same institution. His research interests include non-synchronous circuits, computer architecture, EDA techniques and tools. He is a Student Member of the IEEE and of the Brazilian Computer Society (SBC).

Luciano Ost, Loughborough University

Luciano Ost is currently a Faculty Member with Loughborough University’s Wolfson School - UK. He received his Ph.D. degree in Computer Science from PUCRS, Brazil in 2010. During his Ph.D., Dr. Ost worked as an invited researcher at the Microelectronic Systems Institute of the Technische Universitaet Darmstadt (from 2007 to 2008) and at the University of York (October 2009). After the completion of his doctorate, he worked as a research assistant (2 years) and then as an assistant professor (2 years) at the University of Montpellier II in France. He has authored more than 90 papers and his research is devoted to advancing hardware and software architectures to improve performance, security, and reliability of life-critical and multiprocessing embedded systems.

Ney Calazans, PUCRS University

Ney L. V. Calazans holds a Ph.D. degree in Microelectronics from UCL-Belgium, obtained in 1993, and an M.Sc. in Computer Science and a BS in Electrical Engineering, both from UFRGS (Brazil), resp. obtained in 1985 and in 1988. He is a Professor at the PUCRS (Brazil) where he works since 1986. Since 1994 he is a permanent member of the CS graduate program (PPGCC) at PUCRS. During the 2014-2015 period he followed a Post-Doctorate Senior stage at the University of Southern California (USC) in Los Angeles, CA (USA). Prof. Calazans research interests include non-synchronous circuits, intrachip communication networks and EDA techniques and tools. He has authored around 200 publications on his fields of interest. He is a CNPq Researcher (PQ-1C), a Senior Member of the IEEE and a Member of the Brazilian Computer Society (SBC) and of the Brazilian Society of Microelectronics (SBMicro).

Rafael Garibotti, PUCRS University

Rafael Garibotti (M’14-SM’22) is an Associate Professor at PUCRS University. Formerly he was a Visiting Scholar at Université Grenoble Alpes, France. He was also a Postdoctoral Fellow at both the prestigious School of Engineering and Applied Sciences of Harvard University, US and UFRGS, Brazil. He received his Ph.D. and MSc. Degree in Microelectronics, respectively from the University of Montpellier and EMSE, France and his BSc. Degree in Computer Engineering from PUCRS University. He is a distinguished Brazilian researcher (CNPq PQ-2 grant). His research activity focuses on AI safety, robotics and autonomous systems, multicore architectures and robust deep learning.

César Marcon, PUCRS University

César Marcon (SM’19) is a Professor at PUCRS University, Brazil since 1995. He received his Ph.D. degree in Computer Science from the Federal University of Rio Grande do Sul in 2005. Professor Marcon is a Senior Member of the Institute of Electrical and Electronics Engineers (IEEE) and a member of the Association for Computing Machinery (ACM) and Brazilian Computer Society (SBC). He is a distinguished Brazilian researcher with a CNPq PQ-2 grant. He has more than 150 papers published in prestigious journals and conference proceedings. Since 2005, prof. Marcon coordinated several projects in health, telecommunications, and microelectronics areas with a total budget exceeding US$2 million.

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Published

2022-06-28

How to Cite

Lodéa, N., Nunes, W., Zanini, V., Sartori, M., Ost, L., Calazans, N., Garibotti, R., & Marcon, C. (2022). Early Soft Error Reliability Analysis on RISC-V. IEEE Latin America Transactions, 20(9), 2139–2145. Retrieved from https://latamt.ieeer9.org/index.php/transactions/article/view/6245

Issue

Vol. 20 No. 9 (2022): Ordinary Issue

Section

Computing