EQUIHUA, C.; ANIDES, E.; GARCÍA, J. L.; VÁZQUEZ, E.; SÁNCHEZ, G.; AVALOS, J.-G.; SÁNCHEZ, G. A low-cost and highly compact FPGA-based encryption/decryption architecture for AES algorithm . IEEE Latin America Transactions, [S. l.], v. 19, n. 9, p. 1443–1450, 2021. Disponível em: https://latamt.ieeer9.org/index.php/transactions/article/view/4611. Acesso em: 24 apr. 2024.