[1]
Equihua, C., Anides, E., García, J.L., Vázquez, E., Sánchez, G., Avalos, J.-G. and Sánchez, G. 2021. A low-cost and highly compact FPGA-based encryption/decryption architecture for AES algorithm . IEEE Latin America Transactions. 19, 9 (Mar. 2021), 1443–1450.