@article{Uhlendorf_Silva_Viel_Zeferino_2021, title={An MPI-based MPSoC Platform in FPGA}, volume={19}, url={https://latamt.ieeer9.org/index.php/transactions/article/view/3928}, abstractNote={<p>The increase in the level of integration of components on silicon became possible to build systems with multiple processors on a single chip. These systems are named MPSoCs (Multi-Processor Systems-on-Chip), and some of them use Networks-on-Chip (NoC) as the communication infrastructure to interconnect their components. This work presents an MPSoC platform designed for performance evaluation of an NoC in FPGA. The platform relies on the use of 32-bit programmable processors and an MPI (Message Passing Interface) communication library, providing a flexible infrastructure for traffic generation and analysis, and enabling the development of parallel applications. For evaluation, we implemented a proof-of-concept instance of the proposed platform in FPGA, and the experimental results show that the software layer of the communication infrastructure dominates communication latency.</p>}, number={4}, journal={IEEE Latin America Transactions}, author={Uhlendorf, Roseli and Silva, Eduardo and Viel, Felipe and Zeferino, Cesar}, year={2021}, month={Jun.}, pages={697–705} }